555 Timer Calculator — Astable & Monostable

How the 555 actually works

When to use this: you need a square wave, a clock, a flashing LED, a tone, a PWM carrier, a delay after a button press, or a debouncer — and you would rather solder three passives than write firmware. The 555 has been the default answer to all of those since 1972, and the two formulas below cover essentially every one of them.

Almost every 555 tutorial hands you the equations and stops. The equations are far easier to remember, and far easier to debug, once you know what is inside the package. There are only five blocks, and every quirk of the chip follows from them.

The resistor divider. Three 5 kΩ resistors sit in series between V+ and ground — that is where the name comes from. They create two fixed reference voltages at exactly one third and two thirds of the supply. Because those references are derived from the same supply that charges your timing capacitor, they scale with it. This is the single most important fact about the 555: the trip points move with the supply, the charging curve moves with the supply, the ratio stays constant, and so the timing does not depend on supply voltage at all. A 555 keeps time on a battery sagging from 9 V to 6 V.

Two comparators. The upper one watches the threshold pin (pin 6) against the ⅔ V+ reference. The lower one watches the trigger pin (pin 2) against the ⅓ V+ reference. One says “the capacitor has charged far enough”, the other says “the capacitor has discharged far enough”, or in monostable use, “something outside has asked me to start”.

An SR flip-flop. The lower comparator sets it, the upper one resets it. A flip-flop is what makes the 555 a timer rather than a comparator: it remembers which half of the cycle it is in, so the output does not chatter as the capacitor voltage crosses a threshold slowly.

A discharge transistor. An NPN with its collector on pin 7 and its emitter on ground, driven by the flip-flop. When the output is low, this transistor is hard on and provides the discharge path for your capacitor. It is rated to sink around 200 mA, and it is the part of the chip most often abused — every warning about keeping R1 + R2 above 1 kΩ is about protecting it.

An output stage. A totem-pole driver on pin 3 capable of sourcing or sinking 200 mA, which is remarkable for a chip this old and this cheap. It is also the reason the bipolar 555 is notorious for glitching: switching that much current in a few nanoseconds punches a hole in a poorly decoupled supply rail.

The formulas

Astable — a free-running oscillator, with R1 from V+ to pin 7, R2 from pin 7 to pins 6 and 2, and C from pins 6/2 to ground:

tHigh = ln(2) × (R1 + R2) × C ≈ 0.693 (R1 + R2) C
tLow = ln(2) × R2 × C ≈ 0.693 R2 C
T = tHigh + tLow = 0.693 (R1 + 2R2) C
f = 1 / T = 1.44 / ((R1 + 2R2) C)
D = (R1 + R2) / (R1 + 2R2)

Monostable — a one-shot, with a single R from V+ to pins 6 and 7:

T = ln(3) × R × C ≈ 1.1 R C

R1 and R2 are in ohms, C in farads, T and tHigh/tLow in seconds, f in hertz and D as a fraction between 0.5 and 1. Note that the supply voltage appears nowhere.

Where 0.693 and 1.1 come from

A capacitor charging through a resistor towards a supply closes a fixed fraction of the remaining gap in each time constant. In astable operation the capacitor swings between ⅓ V+ and ⅔ V+. Starting at ⅓ V+, the gap to the supply is ⅔ V+; ending at ⅔ V+, the gap is ⅓ V+. Exactly half the gap has been closed, and closing half a gap takes ln(2) = 0.6931 time constants. Discharging from ⅔ V+ down to ⅓ V+ is the same halving in reverse, so it also takes ln(2) time constants — just with a different resistance in the path.

In monostable operation the capacitor starts fully discharged at 0 V rather than at ⅓ V+. Now the gap goes from the full supply down to ⅓ V+, so one third of it remains, and closing two thirds of a gap takes ln(3) = 1.0986 time constants. Datasheets print this as 1.1RC, which overstates the real pulse by about 0.13% — utterly swamped by capacitor tolerance, but worth knowing when you are chasing the last percent.

Common R and C combinations

Pick the capacitor first. Capacitors come in roughly a dozen useful values per decade; resistors come in twenty-four. Choose C to put you in the right decade, then solve for the resistors. These astable combinations all use E12 parts and land within a few percent of a round number:

And for monostable one-shots, where a single resistor sets everything:

Notice that the last row is already uncomfortable: 56 µF means an electrolytic with −20/+80% tolerance and meaningful leakage of its own. Anything beyond a minute or so is a job for a CMOS 7555 with a low-leakage film capacitor, or for a counter chip dividing a faster and more accurate oscillator.

Why the duty cycle is always above 50%, and the diode fix

This trips up more people than everything else about the chip combined. In a standard astable the capacitor charges through R1 and R2 in series, but discharges through R2 alone into pin 7. The charging path is always the longer one, so the output is always high for longer than it is low. Duty cycle is (R1 + R2) / (R1 + 2R2), which tends towards 50% as R1 becomes negligible against R2 but can never get there — and R1 cannot be made arbitrarily small, because it is the only thing limiting the current through the discharge transistor.

The classic fix is a small-signal diode such as a 1N4148 across R2, cathode towards pin 7. On the charging half-cycle the diode conducts and shorts out R2, so the capacitor charges through R1 alone; on the discharging half-cycle the diode is reverse biased and the current goes through R2 as usual. That gives roughly:

tHigh ≈ 0.693 R1 C  and  tLow = 0.693 R2 C, so D ≈ R1 / (R1 + R2)

Now any duty cycle from a few percent to 95% is available, and R1 = R2 gives roughly 50%. “Roughly”, because the diode drops 0.6 V or so, which shifts the effective charging supply and makes the high time slightly longer than the formula predicts. If you need a duty cycle that is genuinely accurate rather than approximately right, run the 555 at twice your target frequency and divide by two with a 74HC74 flip-flop. The result is 50.00% by construction, independent of every tolerance in the circuit.

NE555, CMOS 7555 or a microcontroller?

For anything battery powered, anything below 4.5 V, anything with timing resistors above a megohm, and anything sensitive to supply noise, the CMOS versions are simply better parts and cost a few tens of cents more. Reach for the bipolar NE555 when you actually want the 200 mA output drive — driving a relay coil, a solenoid, or a string of LEDs directly.

Decoupling, pin 5 and the layout that makes it work

The most common 555 complaint — “my timer double-triggers”, “the frequency is not stable”, “there is a glitch on the output” — is nearly always a power supply problem rather than a timing problem. During each transition the bipolar output stage briefly conducts both halves of the totem pole at once and pulls a spike of current from the rail. That spike develops a voltage across the inductance of the supply wiring, and because the comparator references are derived from the rail, the trip points move for a moment. Sometimes they move far enough to re-trigger the flip-flop.

Two capacitors fix it, and both matter:

• 100 nF ceramic directly across pins 8 and 1, with the shortest possible leads, plus 10 µF of bulk electrolytic or tantalum somewhere nearby. Short leads are not a nicety here — an extra centimetre of track is roughly 10 nH and defeats the point.
• 10 nF from pin 5 to ground. Pin 5 is the control voltage pin, connected directly to the internal ⅔ V+ reference. Left floating it is a high-impedance antenna wired straight into the comparator that decides when your timing period ends. Bypassing it is the difference between a stable oscillator and one that shifts frequency when you wave your hand near the board.

Pin 4 is reset, active low, and it must be tied to V+ if you are not using it. A floating reset pin holds the output low intermittently and produces the same symptoms as a dead chip. Where the reset is genuinely useful, drive it from a pushbutton or a microcontroller pin to abort a monostable pulse before it finishes.

Practical notes that save an evening

• The capacitor sets your accuracy, not the resistor. Resistors are ±1% for pennies; electrolytics are −20/+80% and drift with temperature and age. If a frequency has to be right, use a film or C0G/NP0 capacitor and trim with a resistor.
• Keep R1 + R2 above 1 kΩ. Below that, the discharge transistor is being asked for more than a hundred milliamps every cycle, it stops saturating cleanly and the low output level rises.
• Keep the timing resistance below about 10 MΩ on a bipolar 555. The threshold pin draws roughly 100 nA of bias current; through 10 MΩ that is a full volt of error, before board leakage and flux residue are considered.
• A monostable ignores its trigger while it is running. That is exactly why it makes a good debouncer — the first bounce fires it and the rest are ignored — but it also means the trigger must return above ⅓ V+ before the period ends. If the trigger can be held low, feed it through a 10 nF and 10 kΩ differentiator.
• Do not expect a 555 to make a servo pulse on its own. An astable gives you the 20 ms frame, but not the 1–2 ms pulse inside it. That takes a second 555 in monostable mode, triggered by the first.